|
Interrupt
|
Vector
|
Description
|
|
reset
|
0x00 to
0x07
|
Reset vector at location 0x0.
User must insert a branch instruction at this address.
|
|
_ex_debug
|
0x08
|
Debug exception
|
|
_ex_wdog_exp
|
0x0A
|
Timer/counters, watchdog
timer expired
|
|
_ex_adr_err
|
0x0C
|
MMU: access to an unmapped
address
EMI: access to a chip select that is disabled
|
|
_ex_reserved
|
0x0E
|
|
|
_ex_tim
|
0x10
|
Exception interrupt from
timer/counter module
|
|
_ex_v33
|
0x12
|
Exception interrupt from
VDD 3.3V sense
|
|
_ex_usarta
|
0x14
|
Exception interrupt from
DUSART channel A
|
|
_ex_usartb
|
0x16
|
Exception interrupt from
DUSART channel B
|
|
_ex_uart1a
|
0x18
|
Exception interrupt from
DUART1 channel A
|
|
_ex_uart1b
|
0x1A
|
Exception interrupt from
DUART1 channel B
|
|
_ex_uart2a
|
0x1C
|
Exception interrupt from
DUART2 channel A
|
|
_ex_uart2b
|
0x1E
|
Exception interrupt from
DUART2 channel B
|
|
_int_tmr_exp
|
0x20
|
Timer/counters, timer TMR
underflow
|
|
_int_cnt1_exp
|
0x22
|
Timer/counters, counter CNT1
underflow
|
|
_int_cnt2_exp
|
0x24
|
Timer/counters, counter CNT2
underflow
|
|
_int_cnt1_match
|
0x26
|
Timer/counters, counter CNT1
comparator match
|
|
_int_cnt2_match
|
0x28
|
Timer/counters, counter CNT2
comparator match
|
|
_int_pwm1_exp
|
0x2A
|
Timer/counters, PWM1
underflow
|
|
_int_pwm2_exp
|
0x2C
|
Timer/counters, PWM2
underflow
|
|
_int_pwm1_match
|
0x2E
|
Timer/counters, PWM1
transition value match
|
|
_int_pwm2_match
|
0x30
|
Timer/counters, PWM2
transition value match
|
|
_int_cap_exp
|
0x32
|
Timer/counters, input
capture timer overflow
|
|
_int_cap1
|
0x34
|
Timer/counters, input
capture timer event 1
|
|
_int_cap2
|
0x36
|
Timer/counters, input
capture timer event 2
|
|
_int_cap3
|
0x38
|
Timer/counters, input
capture timer event 3
|
|
_int_cap4
|
0x3A
|
Timer/counters, input
capture timer event 4
|
|
_int_cap5
|
0x3C
|
Timer/counters, input
capture timer event 5
|
|
_int_cap6
|
0x3E
|
Timer/counters, input
capture timer event 6
|
|
_int_ltmr_exp
|
0x40
|
Timer/counters, long
interval timer LTMR underflow
|
|
_int_espi
|
0x42
|
ESPI interrupts, tx ready,
rx ready
|
|
_int_emac
|
0x44
|
Ethernet MAC interrupts
|
|
_int_mcpwm
|
0x46
|
MCPWM interrupts, period,
transition
|
|
_int_usb_core
|
0x48
|
USB core interrupts
|
|
_int_usb_wakeup
|
0x4A
|
USB wakeup event
interrupt
|
|
_int_usb_fifo
|
0x4C
|
USB FIFO interrupts
|
|
_int_usb_dma
|
0x4E
|
USB DMA interrupts
|
|
_int_aci
|
0x50
|
ACI module, ADC/DAC ready
(conversion complete)
|
|
_int_i2s
|
0x52
|
I2S port interrupts
|
|
_int_usarta_rx_rdy
|
0x54
|
DUSART channel A receive
port ready
|
|
_int_usarta_tx_rdy
|
0x56
|
DUSART channel A transmit
port ready
|
|
_int_usartb_rx_rdy
|
0x58
|
DUSART channel B receive
port ready
|
|
_int_usartb_tx_rdy
|
0x5A
|
DUSART channel B transmit
port ready
|
|
_int_sci_tx_done
|
0x5C
|
DUSART smart card transmit
data complete
|
|
_int_sci_tx_err
|
0x5E
|
DUSART smart card transmit
error detected
|
|
_int_sci
|
0x60
|
DUSART general smart card
interrupt
|
|
_int_ifr_tx_done
|
0x62
|
DUSART infrared transmit
data complete
|
|
_int_ifr_rx_done
|
0x64
|
DUSART infrared receive data
complete
|
|
_int_ifr_rx_err
|
0x66
|
DUSART infrared receive
error detected
|
|
_int_ifr_frame_done
|
0x68
|
DUSART infrared frame
complete
|
|
_int_uart1a_tx_rdy
|
0x6A
|
DUART 1A transmit port
ready
|
|
_int_uart1a_rx_rdy
|
0x6C
|
DUART 1A receive port
ready
|
|
_int_uart1b_tx_rdy
|
0x6E
|
DUART 1B transmit port
ready
|
|
_int_uart1b_rx_rdy
|
0x70
|
DUART 1B receive port
ready
|
|
_int_uart2a_tx_rdy
|
0x72
|
DUART 2A transmit port
ready
|
|
_int_uart2a_rx_rdy
|
0x74
|
DUART 2A receive port
ready
|
|
_int_uart2b_tx_rdy
|
0x76
|
DUART 2B transmit port
ready
|
|
_int_uart2b_rx_rdy
|
0x78
|
DUART 2B receive port
ready
|
|
_int_ehi
|
0x7A
|
EHI module interrupt
|
|
_int_gpio
|
0x7C
|
GPIO interrupt (edge or
level detect)
|
|
_int_dsci
|
0x7E
|
DSCI interrupt (dual smart
card interface)
|
