Appendix G Register Map
The eCOG1X contains the following
registers:
Table 151: eCOG1X register
map
|
Address
|
Name
|
Reset
|
Type
|
Page
|
|
0xFAA4
|
port.sel1
|
0x0000
|
RW
|
8.3.2
|
|
0xFAA6
|
port.sel2
|
0x0000
|
RW
|
8.3.3
|
|
0xFAA8
|
port.sel3
|
0x0000
|
RW
|
8.3.4
|
|
0xFAAA
|
port.sel4
|
0x0000
|
RW
|
8.3.5
|
|
0xFAAC
|
port.sel5
|
0x0000
|
RW
|
8.3.6
|
|
0xFAAE
|
port.disabled
|
|
R
|
8.3.7
|
|
|
|
|
|
|
|
0xFAB0
|
pio.cfg
|
0x0000
|
RW
|
10.3.1
|
|
0xFAB2
|
pio.ctrl
|
0x0000
|
RW
|
10.3.2
|
|
0xFAB4
|
pio.pa_out
|
0x0000
|
RW
|
10.3.3
|
|
0xFAB6
|
pio.pa_in
|
0x0000
|
R
|
10.3.4
|
|
0xFAB8
|
pio.pb_out
|
0x0000
|
RW
|
10.3.5
|
|
0xFABA
|
pio.pb_in
|
0x0000
|
R
|
10.3.6
|
|
|
|
|
|
|
|
0xFABC
|
gpio.ab.cfg_edge1
|
0x0000
|
RW
|
9.8
|
|
0xFABE
|
gpio.ab.cfg_edge0
|
0x0000
|
RW
|
9.8
|
|
0xFAC0
|
gpio.ab.op_mode
|
0x0000
|
RW
|
9.8
|
|
0xFAC2
|
gpio.ab.op_sel
|
0x0000
|
RW
|
9.8
|
|
0xFAC4
|
gpio.ab.ip_en
|
0x0000
|
RW
|
9.8
|
|
0xFAC6
|
gpio.ab.op_set
|
0x0000
|
RW
|
9.8
|
|
0xFAC8
|
gpio.ab.op_clr
|
0x0000
|
RW
|
9.8
|
|
0xFACA
|
gpio.ab.op_en
|
0x0000
|
RW
|
9.8
|
|
0xFACC
|
gpio.ab.op_dis
|
0x0000
|
RW
|
9.8
|
|
0xFACE
|
gpio.ab.pullup_en
|
0x0000
|
RW
|
9.8
|
|
0xFAD0
|
gpio.ab.pullup_dis
|
0x0000
|
RW
|
9.8
|
|
0xFAD2
|
gpio.ab.ip_state
|
0x0000
|
R
|
9.8
|
|
0xFAD4
|
gpio.ab.int_level
|
0x0000
|
RW
|
9.8
|
|
0xFAD6
|
gpio.ab.int_en
|
0x0000
|
RW
|
9.8
|
|
0xFAD8
|
gpio.ab.int_dis
|
0x0000
|
RW
|
9.8
|
|
0xFADA
|
gpio.ab.int_clr
|
0x0000
|
RW
|
9.8
|
|
0xFADC
|
gpio.ab.int_sts
|
0x0000
|
R
|
9.8
|
|
|
|
|
|
|
|
0xFADE
|
gpio.cd.cfg_edge1
|
0x0000
|
RW
|
9.8
|
|
0xFAE0
|
gpio.cd.cfg_edge0
|
0x0000
|
RW
|
9.8
|
|
0xFAE2
|
gpio.cd.op_mode
|
0x0000
|
RW
|
9.8
|
|
0xFAE4
|
gpio.cd.op_sel
|
0x0000
|
RW
|
9.8
|
|
0xFAE6
|
gpio.cd.ip_en
|
0x0000
|
RW
|
9.8
|
|
0xFAE8
|
gpio.cd.op_set
|
0x0000
|
RW
|
9.8
|
|
0xFAEA
|
gpio.cd.op_clr
|
0x0000
|
RW
|
9.8
|
|
0xFAEC
|
gpio.cd.op_en
|
0x0000
|
RW
|
9.8
|
|
0xFAEE
|
gpio.cd.op_dis
|
0x0000
|
RW
|
9.8
|
|
0xFAF0
|
gpio.cd.pullup_en
|
0x0000
|
RW
|
9.8
|
|
0xFAF2
|
gpio.cd.pullup_dis
|
0x0000
|
RW
|
9.8
|
|
0xFAF4
|
gpio.cd.ip_state
|
0x0000
|
R
|
9.8
|
|
0xFAF6
|
gpio.cd.int_level
|
0x0000
|
RW
|
9.8
|
|
0xFAF8
|
gpio.cd.int_en
|
0x0000
|
RW
|
9.8
|
|
0xFAFA
|
gpio.cd.int_dis
|
0x0000
|
RW
|
9.8
|
|
0xFAFC
|
gpio.cd.int_clr
|
0x0000
|
RW
|
9.8
|
|
0xFAFE
|
gpio.cd.int_sts
|
0x0000
|
R
|
9.8
|
|
|
|
|
|
|
|
0xFB00
|
gpio.ef.cfg_edge1
|
0x0000
|
RW
|
9.8
|
|
0xFB02
|
gpio.ef.cfg_edge0
|
0x0000
|
RW
|
9.8
|
|
0xFB04
|
gpio.ef.op_mode
|
0x0000
|
RW
|
9.8
|
|
0xFB06
|
gpio.ef.op_sel
|
0x0000
|
RW
|
9.8
|
|
0xFB08
|
gpio.ef.ip_en
|
0x0000
|
RW
|
9.8
|
|
0xFB0A
|
gpio.ef.op_set
|
0x0000
|
RW
|
9.8
|
|
0xFB0C
|
gpio.ef.op_clr
|
0x0000
|
RW
|
9.8
|
|
0xFB0E
|
gpio.ef.op_en
|
0x0000
|
RW
|
9.8
|
|
0xFB10
|
gpio.ef.op_dis
|
0x0000
|
RW
|
9.8
|
|
0xFB12
|
gpio.ef.pullup_en
|
0x0000
|
RW
|
9.8
|
|
0xFB14
|
gpio.ef.pullup_dis
|
0x0000
|
RW
|
9.8
|
|
0xFB16
|
gpio.ef.ip_state
|
0x0000
|
R
|
9.8
|
|
0xFB18
|
gpio.ef.int_level
|
0x0000
|
RW
|
9.8
|
|
0xFB1A
|
gpio.ef.int_en
|
0x0000
|
RW
|
9.8
|
|
0xFB1C
|
gpio.ef.int_dis
|
0x0000
|
RW
|
9.8
|
|
0xFB1E
|
gpio.ef.int_clr
|
0x0000
|
RW
|
9.8
|
|
0xFB20
|
gpio.ef.int_sts
|
0x0000
|
R
|
9.8
|
|
|
|
|
|
|
|
0xFB22
|
gpio.gh.cfg_edge1
|
0x0000
|
RW
|
9.8
|
|
0xFB24
|
gpio.gh.cfg_edge0
|
0x0000
|
RW
|
9.8
|
|
0xFB26
|
gpio.gh.op_mode
|
0x0000
|
RW
|
9.8
|
|
0xFB28
|
gpio.gh.op_sel
|
0x0000
|
RW
|
9.8
|
|
0xFB2A
|
gpio.gh.ip_en
|
0x0000
|
RW
|
9.8
|
|
0xFB2C
|
gpio.gh.op_set
|
0x0000
|
RW
|
9.8
|
|
0xFB2E
|
gpio.gh.op_clr
|
0x0000
|
RW
|
9.8
|
|
0xFB30
|
gpio.gh.op_en
|
0x0000
|
RW
|
9.8
|
|
0xFB32
|
gpio.gh.op_dis
|
0x0000
|
RW
|
9.8
|
|
0xFB34
|
gpio.gh.pullup_en
|
0x0000
|
RW
|
9.8
|
|
0xFB36
|
gpio.gh.pullup_dis
|
0x0000
|
RW
|
9.8
|
|
0xFB38
|
gpio.gh.ip_state
|
0x0000
|
R
|
9.8
|
|
0xFB3A
|
gpio.gh.int_level
|
0x0000
|
RW
|
9.8
|
|
0xFB3C
|
gpio.gh.int_en
|
0x0000
|
RW
|
9.8
|
|
0xFB3E
|
gpio.gh.int_dis
|
0x0000
|
RW
|
9.8
|
|
0xFB40
|
gpio.gh.int_clr
|
0x0000
|
RW
|
9.8
|
|
0xFB42
|
gpio.gh.int_sts
|
0x0000
|
R
|
9.8
|
|
|
|
|
|
|
|
0xFB44
|
gpio.ij.cfg_edge1
|
0x0000
|
RW
|
9.8
|
|
0xFB46
|
gpio.ij.cfg_edge0
|
0x0000
|
RW
|
9.8
|
|
0xFB48
|
gpio.ij.op_mode
|
0x0000
|
RW
|
9.8
|
|
0xFB4A
|
gpio.ij.op_sel
|
0x0000
|
RW
|
9.8
|
|
0xFB4C
|
gpio.ij.ip_en
|
0x0000
|
RW
|
9.8
|
|
0xFB4E
|
gpio.ij.op_set
|
0x0000
|
RW
|
9.8
|
|
0xFB50
|
gpio.ij.op_clr
|
0x0000
|
RW
|
9.8
|
|
0xFB52
|
gpio.ij.op_en
|
0x0000
|
RW
|
9.8
|
|
0xFB54
|
gpio.ij.op_dis
|
0x0000
|
RW
|
9.8
|
|
0xFB56
|
gpio.ij.pullup_en
|
0x0000
|
RW
|
9.8
|
|
0xFB58
|
gpio.ij.pullup_dis
|
0x0000
|
RW
|
9.8
|
|
0xFB5A
|
gpio.ij.ip_state
|
0x0000
|
R
|
9.8
|
|
0xFB5C
|
gpio.ij.int_level
|
0x0000
|
RW
|
9.8
|
|
0xFB5E
|
gpio.ij.int_en
|
0x0000
|
RW
|
9.8
|
|
0xFB60
|
gpio.ij.int_dis
|
0x0000
|
RW
|
9.8
|
|
0xFB62
|
gpio.ij.int_clr
|
0x0000
|
RW
|
9.8
|
|
0xFB64
|
gpio.ij.int_sts
|
0x0000
|
R
|
9.8
|
|
|
|
|
|
|
|
0xFB66
|
gpio.kl.cfg_edge1
|
0x0000
|
RW
|
9.8
|
|
0xFB68
|
gpio.kl.cfg_edge0
|
0x0000
|
RW
|
9.8
|
|
0xFB6A
|
gpio.kl.op_mode
|
0x0000
|
RW
|
9.8
|
|
0xFB6C
|
gpio.kl.op_sel
|
0x0000
|
RW
|
9.8
|
|
0xFB6E
|
gpio.kl.ip_en
|
0x0000
|
RW
|
9.8
|
|
0xFB70
|
gpio.kl.op_set
|
0x0000
|
RW
|
9.8
|
|
0xFB72
|
gpio.kl.op_clr
|
0x0000
|
RW
|
9.8
|
|
0xFB74
|
gpio.kl.op_en
|
0x0000
|
RW
|
9.8
|
|
0xFB76
|
gpio.kl.op_dis
|
0x0000
|
RW
|
9.8
|
|
0xFB78
|
gpio.kl.pullup_en
|
0x0000
|
RW
|
9.8
|
|
0xFB7A
|
gpio.kl.pullup_dis
|
0x0000
|
RW
|
9.8
|
|
0xFB7C
|
gpio.kl.ip_state
|
0x0000
|
R
|
9.8
|
|
0xFB7E
|
gpio.kl.int_level
|
0x0000
|
RW
|
9.8
|
|
0xFB80
|
gpio.kl.int_en
|
0x0000
|
RW
|
9.8
|
|
0xFB82
|
gpio.kl.int_dis
|
0x0000
|
RW
|
9.8
|
|
0xFB84
|
gpio.kl.int_clr
|
0x0000
|
RW
|
9.8
|
|
0xFB86
|
gpio.kl.int_sts
|
0x0000
|
R
|
9.8
|
|
|
|
|
|
|
|
0xFB88
|
gpio.mn.cfg_edge1
|
0x0000
|
RW
|
9.8
|
|
0xFB8A
|
gpio.mn.cfg_edge0
|
0x0000
|
RW
|
9.8
|
|
0xFB8C
|
gpio.mn.op_mode
|
0x0000
|
RW
|
9.8
|
|
0xFB8E
|
gpio.mn.op_sel
|
0x0000
|
RW
|
9.8
|
|
0xFB90
|
gpio.mn.ip_en
|
0x0000
|
RW
|
9.8
|
|
0xFB92
|
gpio.mn.op_set
|
0x0000
|
RW
|
9.8
|
|
0xFB94
|
gpio.mn.op_clr
|
0x0000
|
RW
|
9.8
|
|
0xFB96
|
gpio.mn.op_en
|
0x0000
|
RW
|
9.8
|
|
0xFB98
|
gpio.mn.op_dis
|
0x0000
|
RW
|
9.8
|
|
0xFB9A
|
gpio.mn.pullup_en
|
0x0000
|
RW
|
9.8
|
|
0xFB9C
|
gpio.mn.pullup_dis
|
0x0000
|
RW
|
9.8
|
|
0xFB9E
|
gpio.mn.ip_state
|
0x0000
|
R
|
9.8
|
|
0xFBA0
|
gpio.mn.int_level
|
0x0000
|
RW
|
9.8
|
|
0xFBA2
|
gpio.mn.int_en
|
0x0000
|
RW
|
9.8
|
|
0xFBA4
|
gpio.mn.int_dis
|
0x0000
|
RW
|
9.8
|
|
0xFBA6
|
gpio.mn.int_clr
|
0x0000
|
RW
|
9.8
|
|
0xFBA8
|
gpio.mn.int_sts
|
0x0000
|
R
|
9.8
|
|
|
|
|
|
|
|
0xFBAA
|
gpio.pq.cfg_edge1
|
0x0000
|
RW
|
9.8
|
|
0xFBAC
|
gpio.pq.cfg_edge0
|
0x0000
|
RW
|
9.8
|
|
0xFBAE
|
gpio.pq.op_mode
|
0x0000
|
RW
|
9.8
|
|
0xFBB0
|
gpio.pq.op_sel
|
0x0000
|
RW
|
9.8
|
|
0xFBB2
|
gpio.pq.ip_en
|
0x0000
|
RW
|
9.8
|
|
0xFBB4
|
gpio.pq.op_set
|
0x0000
|
RW
|
9.8
|
|
0xFBB6
|
gpio.pq.op_clr
|
0x0000
|
RW
|
9.8
|
|
0xFBB8
|
gpio.pq.op_en
|
0x0000
|
RW
|
9.8
|
|
0xFBBA
|
gpio.pq.op_dis
|
0x0000
|
RW
|
9.8
|
|
0xFBBC
|
gpio.pq.pullup_en
|
0x0000
|
RW
|
9.8
|
|
0xFBBE
|
gpio.pq.pullup_dis
|
0x0000
|
RW
|
9.8
|
|
0xFBC0
|
gpio.pq.ip_state
|
0x0000
|
R
|
9.8
|
|
0xFBC2
|
gpio.pq.int_level
|
0x0000
|
RW
|
9.8
|
|
0xFBC4
|
gpio.pq.int_en
|
0x0000
|
RW
|
9.8
|
|
0xFBC6
|
gpio.pq.int_dis
|
0x0000
|
RW
|
9.8
|
|
0xFBC8
|
gpio.pq.int_clr
|
0x0000
|
RW
|
9.8
|
|
0xFBCA
|
gpio.pq.int_sts
|
0x0000
|
R
|
9.8
|
|
|
|
|
|
|
|
0xFBCC
|
gpio.rs.cfg_edge1
|
0x0000
|
RW
|
9.8
|
|
0xFBCE
|
gpio.rs.cfg_edge0
|
0x0000
|
RW
|
9.8
|
|
0xFBD0
|
gpio.rs.op_mode
|
0x0000
|
RW
|
9.8
|
|
0xFBD2
|
gpio.rs.op_sel
|
0x0000
|
RW
|
9.8
|
|
0xFBD4
|
gpio.rs.ip_en
|
0x0000
|
RW
|
9.8
|
|
0xFBD6
|
gpio.rs.op_set
|
0x0000
|
RW
|
9.8
|
|
0xFBD8
|
gpio.rs.op_clr
|
0x0000
|
RW
|
9.8
|
|
0xFBDA
|
gpio.rs.op_en
|
0x0000
|
RW
|
9.8
|
|
0xFBDC
|
gpio.rs.op_dis
|
0x0000
|
RW
|
9.8
|
|
0xFBDE
|
gpio.rs.pullup_en
|
0x0000
|
RW
|
9.8
|
|
0xFBE0
|
gpio.rs.pullup_dis
|
0x0000
|
RW
|
9.8
|
|
0xFBE2
|
gpio.rs.ip_state
|
0x0000
|
R
|
9.8
|
|
0xFBE4
|
gpio.rs.int_level
|
0x0000
|
RW
|
9.8
|
|
0xFBE6
|
gpio.rs.int_en
|
0x0000
|
RW
|
9.8
|
|
0xFBE8
|
gpio.rs.int_dis
|
0x0000
|
RW
|
9.8
|
|
0xFBEA
|
gpio.rs.int_clr
|
0x0000
|
RW
|
9.8
|
|
0xFBEC
|
gpio.rs.int_sts
|
0x0000
|
R
|
9.8
|
|
|
|
|
|
|
|
0xFBEE
|
gpio.t.cfg_edge1
|
0x0000
|
RW
|
9.8
|
|
0xFBF0
|
gpio.t.cfg_edge0
|
0x0000
|
RW
|
9.8
|
|
0xFBF2
|
gpio.t.op_mode
|
0x0000
|
RW
|
9.8
|
|
0xFBF4
|
gpio.t.op_sel
|
0x0000
|
RW
|
9.8
|
|
0xFBF6
|
gpio.t.ip_en
|
0x0000
|
RW
|
9.8
|
|
0xFBF8
|
gpio.t.op_set
|
0x0000
|
RW
|
9.8
|
|
0xFBFA
|
gpio.t.op_clr
|
0x0000
|
RW
|
9.8
|
|
0xFBFC
|
gpio.t.op_en
|
0x0000
|
RW
|
9.8
|
|
0xFBFE
|
gpio.t.op_dis
|
0x0000
|
RW
|
9.8
|
|
0xFC00
|
gpio.t.pullup_en
|
0x0000
|
RW
|
9.8
|
|
0xFC02
|
gpio.t.pullup_dis
|
0x0000
|
RW
|
9.8
|
|
0xFC04
|
gpio.t.ip_state
|
0x0000
|
R
|
9.8
|
|
0xFC06
|
gpio.t.int_level
|
0x0000
|
RW
|
9.8
|
|
0xFC08
|
gpio.t.int_en
|
0x0000
|
RW
|
9.8
|
|
0xFC0A
|
gpio.t.int_dis
|
0x0000
|
RW
|
9.8
|
|
0xFC0C
|
gpio.t.int_clr
|
0x0000
|
RW
|
9.8
|
|
0xFC0E
|
gpio.t.int_sts
|
0x0000
|
R
|
9.8
|
|
|
|
|
|
|
|
0xFC10
|
duart1.ctrl
|
0x0000
|
RW
|
12.8.1
|
|
0xFC12
|
duart1.frame_cfg
|
0x0000
|
RW
|
12.8.2
|
|
0xFC14
|
duart1.a_tmr_cfg
|
0x0000
|
RW
|
12.8.3
|
|
0xFC16
|
duart1.a_baud
|
0x0000
|
RW
|
12.8.4
|
|
0xFC18
|
duart1.a_sts
|
0x0000
|
R
|
12.8.5
|
|
0xFC1A
|
duart1.a_int_en
|
0x0000
|
RW
|
12.8.6
|
|
0xFC1C
|
duart1.a_int_dis
|
0x0000
|
W
|
12.8.7
|
|
0xFC1E
|
duart1.a_int_clr
|
0x0000
|
W
|
12.8.8
|
|
0xFC20
|
duart1.a_rx
|
0x0000
|
R
|
12.8.9
|
|
0xFC22
|
reserved
|
|
|
|
|
0xFC24
|
duart1.a_tx8
|
0x0000
|
RW
|
12.8.10
|
|
0xFC26
|
duart1.a_tx16
|
0x0000
|
RW
|
12.8.11
|
|
0xFC28
|
duart1.b_tmr_cfg
|
0x0000
|
RW
|
12.8.12
|
|
0xFC2A
|
duart1.b_baud
|
0x0000
|
RW
|
12.8.13
|
|
0xFC2C
|
duart1.b_sts
|
0x0000
|
R
|
12.8.14
|
|
0xFC2E
|
duart1.b_int_en
|
0x0000
|
RW
|
12.8.15
|
|
0xFC30
|
duart1.b_int_dis
|
0x0000
|
W
|
12.8.16
|
|
0xFC32
|
duart1.b_int_clr
|
0x0000
|
W
|
12.8.17
|
|
0xFC34
|
duart1.b_rx
|
0x0000
|
R
|
12.8.18
|
|
0xFC36
|
reserved
|
|
|
|
|
0xFC38
|
duart1.b_tx8
|
0x0000
|
RW
|
12.8.19
|
|
0xFC3A
|
duart1.b_tx16
|
0x0000
|
RW
|
12.8.20
|
|
|
|
|
|
|
|
0xFC3C
|
duart2.ctrl
|
0x0000
|
RW
|
12.9.1
|
|
0xFC3E
|
duart2.frame_cfg
|
0x0000
|
RW
|
12.9.2
|
|
0xFC40
|
duart2.a_tmr_cfg
|
0x0000
|
RW
|
12.9.3
|
|
0xFC42
|
duart2.a_baud
|
0x0000
|
RW
|
12.9.4
|
|
0xFC44
|
duart2.a_sts
|
0x0000
|
R
|
12.9.5
|
|
0xFC46
|
duart2.a_int_en
|
0x0000
|
RW
|
12.9.6
|
|
0xFC48
|
duart2.a_int_dis
|
0x0000
|
W
|
12.9.7
|
|
0xFC4A
|
duart2.a_int_clr
|
0x0000
|
W
|
12.9.8
|
|
0xFC4C
|
duart2.a_rx
|
0x0000
|
R
|
12.9.9
|
|
0xFC4E
|
reserved
|
|
|
|
|
0xFC50
|
duart2.a_tx8
|
0x0000
|
RW
|
12.9.10
|
|
0xFC52
|
duart2.a_tx16
|
0x0000
|
RW
|
12.9.11
|
|
0xFC54
|
duart2.b_tmr_cfg
|
0x0000
|
RW
|
12.9.12
|
|
0xFC56
|
duart2.b_baud
|
0x0000
|
RW
|
12.9.13
|
|
0xFC58
|
duart2.b_sts
|
0x0000
|
R
|
12.9.14
|
|
0xFC5A
|
duart2.b_int_en
|
0x0000
|
RW
|
12.9.15
|
|
0xFC5C
|
duart2.b_int_dis
|
0x0000
|
W
|
12.9.16
|
|
0xFC5E
|
duart2.b_int_clr
|
0x0000
|
W
|
12.9.17
|
|
0xFC60
|
duart2.b_rx
|
0x0000
|
R
|
12.9.18
|
|
0xFC62
|
reserved
|
|
|
|
|
0xFC64
|
duart2.b_tx8
|
0x0000
|
RW
|
12.9.19
|
|
0xFC66
|
duart2.b_tx16
|
0x0000
|
RW
|
12.9.20
|
|
|
|
|
|
|
|
0xFC68
|
dusart.a_cfg
|
0x0000
|
RW
|
13.8.1
|
|
0xFC6A
|
dusart.a_smpl_cfg
|
0x0000
|
RW
|
13.8.2
|
|
0xFC6C
|
dusart.a_sym_cfg
|
0x0000
|
RW
|
13.8.3
|
|
0xFC6E
|
dusart.a_tim_cfg
|
0x0000
|
RW
|
13.8.4
|
|
0xFC70
|
dusart.a0_tx8
|
0x0000
|
W
|
13.8.5
|
|
0xFC72
|
dusart.a0_tx16
|
0x0000
|
W
|
13.8.6
|
|
0xFC74
|
dusart.a0_tx8_last
|
0x0000
|
W
|
13.8.7
|
|
0xFC76
|
dusart.a0_tx16_last
|
0x0000
|
W
|
13.8.8
|
|
0xFC78
|
dusart.a1_tx8
|
0x0000
|
W
|
13.8.9
|
|
0xFC7A
|
dusart.a1_tx16
|
0x0000
|
W
|
13.8.10
|
|
0xFC7C
|
dusart.a1_tx8_last
|
0x0000
|
W
|
13.8.11
|
|
0xFC7E
|
dusart.a1_tx16_last
|
0x0000
|
W
|
13.8.12
|
|
0xFC80
|
dusart.a0_rx8
|
0x0000
|
R
|
13.8.13
|
|
0xFC82
|
dusart.a0_rx16
|
0x0000
|
R
|
13.8.14
|
|
0xFC84
|
dusart.a0_rx8_last
|
0x0000
|
R
|
13.8.15
|
|
0xFC86
|
dusart.a0_rx16_last
|
0x0000
|
R
|
13.8.16
|
|
0xFC88
|
dusart.a1_rx8
|
0x0000
|
R
|
13.8.17
|
|
0xFC8A
|
dusart.a1_rx16
|
0x0000
|
R
|
13.8.18
|
|
0xFC8C
|
dusart.a1_rx8_last
|
0x0000
|
R
|
13.8.19
|
|
0xFC8E
|
dusart.a1_rx16_last
|
0x0000
|
R
|
13.8.20
|
|
0xFC90
|
dusart.a_int_sts
|
0x0000
|
R
|
13.8.21
|
|
0xFC92
|
dusart.a_int_en
|
0x0000
|
RW
|
13.8.22
|
|
0xFC94
|
dusart.a_int_dis
|
0x0000
|
W
|
13.8.23
|
|
0xFC96
|
dusart.a_int_clr
|
0x0000
|
W
|
13.8.24
|
|
0xFC98
|
dusart.a_ex_sts
|
0x0000
|
R
|
13.8.25
|
|
0xFC9A
|
dusart.a_ex_en
|
0x0000
|
RW
|
13.8.26
|
|
0xFC9C
|
dusart.a_ex_dis
|
0x0000
|
W
|
13.8.27
|
|
0xFC9E
|
dusart.a_ex_clr
|
0x0000
|
W
|
13.8.28
|
|
|
|
|
|
|
|
0xFCA0
|
dusart.b_cfg
|
0x0000
|
RW
|
13.8.29
|
|
0xFCA2
|
dusart.b_smpl_cfg
|
0x0000
|
RW
|
13.8.30
|
|
0xFCA4
|
dusart.b_sym_cfg
|
0x0000
|
RW
|
13.8.31
|
|
0xFCA6
|
dusart.b_tim_cfg
|
0x0000
|
RW
|
13.8.32
|
|
0xFCA8
|
dusart.b0_tx8
|
0x0000
|
W
|
13.8.33
|
|
0xFCAA
|
dusart.b0_tx16
|
0x0000
|
W
|
13.8.34
|
|
0xFCAC
|
dusart.b0_tx8_last
|
0x0000
|
W
|
13.8.35
|
|
0xFCAE
|
dusart.b0_tx16_last
|
0x0000
|
W
|
13.8.36
|
|
0xFCB0
|
dusart.b1_tx8
|
0x0000
|
W
|
13.8.37
|
|
0xFCB2
|
dusart.b1_tx16
|
0x0000
|
W
|
13.8.38
|
|
0xFCB4
|
dusart.b1_tx8_last
|
0x0000
|
W
|
13.8.39
|
|
0xFCB6
|
dusart.b1_tx16_last
|
0x0000
|
W
|
13.8.40
|
|
0xFCB8
|
dusart.b0_rx8
|
0x0000
|
R
|
13.8.41
|
|
0xFCBA
|
dusart.b0_rx16
|
0x0000
|
R
|
13.8.42
|
|
0xFCBC
|
dusart.b0_rx8_last
|
0x0000
|
R
|
13.8.43
|
|
0xFCBE
|
dusart.b0_rx16_last
|
0x0000
|
R
|
13.8.44
|
|
0xFCC0
|
dusart.b1_rx8
|
0x0000
|
R
|
13.8.45
|
|
0xFCC2
|
dusart.b1_rx16
|
0x0000
|
R
|
13.8.46
|
|
0xFCC4
|
dusart.b1_rx8_last
|
0x0000
|
R
|
13.8.47
|
|
0xFCC6
|
dusart.b1_rx16_last
|
0x0000
|
R
|
13.8.48
|
|
0xFCC8
|
dusart.b_int_sts
|
0x0000
|
R
|
13.8.49
|
|
0xFCCA
|
dusart.b_int_en
|
0x0000
|
RW
|
13.8.50
|
|
0xFCCC
|
dusart.b_int_dis
|
0x0000
|
W
|
13.8.51
|
|
0xFCCE
|
dusart.b_int_clr
|
0x0000
|
W
|
13.8.52
|
|
0xFCD0
|
dusart.b_ex_sts
|
0x0000
|
R
|
13.8.53
|
|
0xFCD2
|
dusart.b_ex_en
|
0x0000
|
RW
|
13.8.54
|
|
0xFCD4
|
dusart.b_ex_dis
|
0x0000
|
W
|
13.8.55
|
|
0xFCD6
|
dusart.b_ex_clr
|
0x0000
|
W
|
13.8.56
|
|
|
|
|
|
|
|
0xFCD8
|
dusart.i2c_cfg
|
0x0000
|
RW
|
14.9.1
|
|
0xFCDA
|
dusart.i2c_slave_cfg
|
0x0000
|
RW
|
14.9.2
|
|
0xFCDC
|
dusart.i2c_master_cmd
|
0x0000
|
RW
|
14.9.3
|
|
|
|
|
|
|
|
0xFCDE
|
dusart.spi_tx_cfg
|
0x0000
|
RW
|
15.8.1
|
|
0xFCE0
|
dusart.spi_rx_cfg
|
0x0000
|
RW
|
15.8.2
|
|
0xFCE2
|
dusart.spi_ctrl
|
0x0000
|
RW
|
15.8.3
|
|
0xFCE4
|
dusart.spi_frame_ctrl
|
0x0000
|
RW
|
15.8.4
|
|
0xFCE6
|
dusart.spi_sts
|
0x0000
|
R
|
15.8.5
|
|
|
|
|
|
|
|
0xFCE8
|
dusart.uart_cfg
|
0x0000
|
RW
|
16.6.1
|
|
0xFCEA
|
dusart.uart_ctrl
|
0x0000
|
RW
|
16.6.2
|
|
|
|
|
|
|
|
0xFCEC
|
dusart.sc_ctrl
|
0x0000
|
RW
|
17.5.1
|
|
0xFCEE
|
dusart.sc_sts
|
0x0000
|
R
|
17.5.2
|
|
0xFCF0
|
dusart.sc_int_en
|
0x0000
|
RW
|
17.5.3
|
|
0xFCF2
|
dusart.sc_int_dis
|
0x0000
|
W
|
17.5.4
|
|
0xFCF4
|
dusart.sc_int_clr
|
0x0000
|
W
|
17.5.5
|
|
0xFCF6
|
dusart.sc_fsm
|
0x0000
|
R
|
17.5.6
|
|
0xFCF8
|
dusart.sc_cfg
|
0x0000
|
RW
|
17.5.7
|
|
0xFCFA
|
dusart.sc_tim_cfg1
|
0x0000
|
RW
|
17.5.8
|
|
0xFCFC
|
dusart.sc_tim_cfg2
|
0x0000
|
RW
|
17.5.9
|
|
0xFCFE
|
dusart.sc_tim_cfg3
|
0x0000
|
RW
|
17.5.10
|
|
|
|
|
|
|
|
0xFD00
|
dusart.ir_ctrl
|
0x0000
|
RW
|
18.6.1
|
|
0xFD02
|
dusart.ir_sts
|
0x0000
|
R
|
18.6.2
|
|
0xFD04
|
dusart.ir_int_en
|
0x0000
|
RW
|
18.6.3
|
|
0xFD06
|
dusart.ir_int_dis
|
0x0000
|
W
|
18.6.4
|
|
0xFD08
|
dusart.ir_int_clr
|
0x0000
|
W
|
18.6.5
|
|
0xFD0A
|
reserved
|
|
|
|
|
0xFD0C
|
dusart.ir_ldin_cfg
|
0x0000
|
RW
|
18.6.6
|
|
0xFD0E
|
dusart.ir_d0_cfg
|
0x0000
|
RW
|
18.6.7
|
|
0xFD10
|
dusart.ir_d1_cfg
|
0x0000
|
RW
|
18.6.8
|
|
0xFD12
|
dusart.ir_ldout_cfg
|
0x0000
|
RW
|
18.6.9
|
|
0xFD14
|
dusart.ir_thresh_cfg
|
0x0000
|
RW
|
18.6.10
|
|
0xFD16
|
dusart.ir_len_cfg
|
0x0000
|
RW
|
18.6.11
|
|
0xFD18
|
dusart.ir_rx_cfg
|
0x0000
|
RW
|
18.6.12
|
|
0xFD1A
|
dusart.ir_rx_bit_cfg
|
0x0000
|
RW
|
18.6.13
|
|
0xFD1C
|
dusart.ir_rx_d0_cfg
|
0x0000
|
RW
|
18.6.14
|
|
0xFD1E
|
dusart.ir_rx_d1_cfg
|
0x0000
|
RW
|
18.6.15
|
|
0xFD20
|
dusart.ir_frame_cfg
|
0x0000
|
RW
|
18.6.16
|
|
|
|
|
|
|
|
0xFD22
|
dusart.usr_a_en
|
0x0000
|
RW
|
19.7.1
|
|
0xFD24
|
dusart.usr_a_dis
|
0x0000
|
W
|
19.7.2
|
|
0xFD26
|
dusart.usr_b_en
|
0x0000
|
RW
|
19.7.3
|
|
0xFD28
|
dusart.usr_b_dis
|
0x0000
|
W
|
19.7.4
|
|
0xFD2A
|
dusart.usr_a_cmd
|
0x0000
|
W
|
19.7.5
|
|
0xFD2C
|
dusart.usr_b_cmd
|
0x0000
|
W
|
19.7.6
|
|
0xFD2E
|
dusart.usr_a_cfg1
|
0x0000
|
RW
|
19.7.7
|
|
0xFD30
|
dusart.usr_b_cfg1
|
0x0000
|
RW
|
19.7.8
|
|
0xFD32
|
dusart.usr_a_cfg2
|
0x0000
|
RW
|
19.7.9
|
|
0xFD34
|
dusart.usr_b_cfg2
|
0x0000
|
RW
|
19.7.10
|
|
0xFD36
|
dusart.usr_a_cfg3
|
0x0000
|
RW
|
19.7.11
|
|
0xFD38
|
dusart.usr_b_cfg3
|
0x0000
|
RW
|
19.7.12
|
|
|
|
|
|
|
|
0xFD3A
|
dsci.a_cfg1
|
0x0000
|
RW
|
28.10.1
|
|
0xFD3C
|
dsci.a_cfg2
|
0x0000
|
RW
|
28.10.2
|
|
0xFD3E
|
dsci.a_etu_cfg
|
0x0000
|
RW
|
28.10.3
|
|
0xFD40
|
dsci.a_tmr_cfg
|
0x0000
|
RW
|
28.10.4
|
|
0xFD42
|
dsci.a_act_delay1
|
0x0000
|
RW
|
28.10.5
|
|
0xFD44
|
dsci.a_act_delay2
|
0x0000
|
RW
|
28.10.6
|
|
0xFD46
|
dsci.a_act_delay3
|
0x0000
|
RW
|
28.10.7
|
|
0xFD48
|
dsci.a_deact_delay
|
0x0000
|
RW
|
28.10.8
|
|
0xFD4A
|
dsci.a_ctrl_en
|
0x0000
|
W
|
28.10.9
|
|
0xFD4C
|
dsci.a_ctrl_dis
|
0x0000
|
W
|
28.10.10
|
|
0xFD4E
|
dsci.a_sts
|
0x0000
|
R
|
28.10.11
|
|
0xFD50
|
dsci.a_int_sts
|
0x0000
|
R
|
28.10.12
|
|
0xFD52
|
dsci.a_int_en
|
0x0000
|
RW
|
28.10.13
|
|
0xFD54
|
dsci.a_int_dis
|
0x0000
|
W
|
28.10.14
|
|
0xFD56
|
dsci.a_int_clr
|
0x0000
|
W
|
28.10.15
|
|
0xFD58
|
dsci.a_tx
|
0x0000
|
RW
|
28.10.16
|
|
0xFD5A
|
dsci.a_rx
|
0x0000
|
R
|
28.10.17
|
|
|
|
|
|
|
|
0xFD5C
|
dsci.b_cfg1
|
0x0000
|
RW
|
28.10.18
|
|
0xFD5E
|
dsci.b_cfg2
|
0x0000
|
RW
|
28.10.19
|
|
0xFD60
|
dsci.b_etu_cfg
|
0x0000
|
RW
|
28.10.20
|
|
0xFD62
|
dsci.b_tmr_cfg
|
0x0000
|
RW
|
28.10.21
|
|
0xFD64
|
dsci.b_act_delay1
|
0x0000
|
RW
|
28.10.22
|
|
0xFD66
|
dsci.b_act_delay2
|
0x0000
|
RW
|
28.10.23
|
|
0xFD68
|
dsci.b_act_delay3
|
0x0000
|
RW
|
28.10.24
|
|
0xFD6A
|
dsci.b_deact_delay
|
0x0000
|
RW
|
28.10.25
|
|
0xFD6C
|
dsci.b_ctrl_en
|
0x0000
|
W
|
28.10.26
|
|
0xFD6E
|
dsci.b_ctrl_dis
|
0x0000
|
W
|
28.10.27
|
|
0xFD70
|
dsci.b_sts
|
0x0000
|
R
|
28.10.28
|
|
0xFD72
|
dsci.b_int_sts
|
0x0000
|
R
|
28.10.29
|
|
0xFD74
|
dsci.b_int_en
|
0x0000
|
RW
|
28.10.30
|
|
0xFD76
|
dsci.b_int_dis
|
0x0000
|
W
|
28.10.31
|
|
0xFD78
|
dsci.b_int_clr
|
0x0000
|
W
|
28.10.32
|
|
0xFD7A
|
dsci.b_tx
|
0x0000
|
RW
|
28.10.33
|
|
0xFD7C
|
dsci.b_rx
|
0x0000
|
R
|
28.10.34
|
|
|
|
|
|
|
|
0xFD7E
|
tim.cmd
|
0x0000
|
W
|
11.11.1
|
|
0xFD80
|
tim.ctrl_en
|
0x0000
|
RW
|
11.11.2
|
|
0xFD82
|
tim.ctrl_dis
|
0x0000
|
W
|
11.11.3
|
|
0xFD84
|
tim.tmr_ld
|
0x0000
|
RW
|
11.11.4
|
|
0xFD86
|
tim.cnt1_ld
|
0x0000
|
RW
|
11.11.5
|
|
0xFD88
|
tim.cnt1_cmp
|
0x0000
|
RW
|
11.11.6
|
|
0xFD8A
|
tim.cnt1_cfg
|
0x0000
|
RW
|
11.11.7
|
|
0xFD8C
|
tim.cnt2_ld
|
0x0000
|
RW
|
11.11.8
|
|
0xFD8E
|
tim.cnt2_cmp
|
0x0000
|
RW
|
11.11.9
|
|
0xFD90
|
tim.cnt2_cfg
|
0x0000
|
RW
|
11.11.10
|
|
0xFD92
|
tim.pwm1_ld
|
0x0000
|
RW
|
11.11.11
|
|
0xFD94
|
tim.pwm1_val
|
0x0000
|
RW
|
11.11.12
|
|
0xFD96
|
tim.pwm1_cfg
|
0x0000
|
RW
|
11.11.13
|
|
0xFD98
|
tim.pwm2_ld
|
0x0000
|
RW
|
11.11.14
|
|
0xFD9A
|
tim.pwm2_val
|
0x0000
|
RW
|
11.11.15
|
|
0xFD9C
|
tim.pwm2_cfg
|
0x0000
|
RW
|
11.11.16
|
|
0xFD9E
|
tim.cap_cfg
|
0x0000
|
RW
|
11.11.17
|
|
0xFDA0
|
tim.wdog_ld
|
0x0000
|
RW
|
11.11.18
|
|
0xFDA2
|
tim.ltmr_ld
|
0x0000
|
RW
|
11.11.19
|
|
0xFDA4
|
tim.tmr_cnt
|
0xFFFF
|
R
|
11.11.20
|
|
0xFDA6
|
tim.cnt1_cnt
|
0xFFFF
|
R
|
11.11.21
|
|
0xFDA8
|
tim.cnt2_cnt
|
0xFFFF
|
R
|
11.11.22
|
|
0xFDAA
|
tim.cap_val1
|
0x0000
|
R
|
11.11.23
|
|
0xFDAC
|
tim.cap_val2
|
0x0000
|
R
|
11.11.24
|
|
0xFDAE
|
tim.cap_val3
|
0x0000
|
R
|
11.11.25
|
|
0xFDB0
|
tim.cap_val4
|
0x0000
|
R
|
11.11.26
|
|
0xFDB2
|
tim.cap_val5
|
0x0000
|
R
|
11.11.27
|
|
0xFDB4
|
tim.cap_val6
|
0x0000
|
R
|
11.11.28
|
|
0xFDB6
|
tim.int_sts1
|
0x0000
|
R
|
11.11.29
|
|
0xFDB8
|
tim.int_sts2
|
0x0000
|
R
|
11.11.30
|
|
0xFDBA
|
tim.int_en1
|
0x0000
|
RW
|
11.11.31
|
|
0xFDBC
|
tim.int_en2
|
0x0000
|
RW
|
11.11.32
|
|
0xFDBE
|
tim.int_dis1
|
0x0000
|
W
|
11.11.33
|
|
0xFDC0
|
tim.int_dis2
|
0x0000
|
W
|
11.11.34
|
|
0xFDC2
|
tim.int_clr1
|
0x0000
|
W
|
11.11.35
|
|
0xFDC4
|
tim.int_clr2
|
0x0000
|
W
|
11.11.36
|
|
|
|
|
|
|
|
0xFDC6
|
cache.cfg
|
0x0000
|
RW
|
5.8.1
|
|
0xFDC8
|
cache.ctrl
|
0x0000
|
RW
|
5.8.2
|
|
|
|
|
|
|
|
0xFDCA
|
mmu.translate_en0
|
0x0000
|
RW
|
4.4.1
|
|
0xFDCC
|
mmu.translate_en1
|
0x0000
|
RW
|
4.4.2
|
|
0xFDCE
|
mmu.flash_code0_log
|
0x0000
|
RW
|
4.4.3
|
|
0xFDD0
|
mmu.flash_code0_phy
|
0x0000
|
RW
|
4.4.4
|
|
0xFDD2
|
mmu.flash_code0_size
|
0x0000
|
RW
|
4.4.5
|
|
0xFDD4
|
mmu.ram_code_log
|
0x0000
|
RW
|
4.4.6
|
|
0xFDD6
|
mmu.ram_code_phy
|
0x0000
|
RW
|
4.4.7
|
|
0xFDD8
|
mmu.ram_code_size
|
0x0000
|
RW
|
4.4.8
|
|
0xFDDA
|
mmu.ext_cs0_code0_log
|
0x0000
|
RW
|
4.4.9
|
|
0xFDDC
|
mmu.ext_cs0_code0_phy
|
0x0000
|
RW
|
4.4.10
|
|
0xFDDE
|
mmu.ext_cs0_code0_size
|
0x0000
|
RW
|
4.4.11
|
|
0xFDE0
|
mmu.ext_cs1_code0_log
|
0x0000
|
RW
|
4.4.12
|
|
0xFDE2
|
mmu.ext_cs1_code0_phy
|
0x0000
|
RW
|
4.4.13
|
|
0xFDE4
|
mmu.ext_cs1_code0_size
|
0x0000
|
RW
|
4.4.14
|
|
0xFDE6
|
mmu.flash_code1_log
|
0x0000
|
RW
|
4.4.15
|
|
0xFDE8
|
mmu.flash_code1_phy
|
0x0000
|
RW
|
4.4.16
|
|
0xFDEA
|
mmu.flash_code1_size
|
0x0000
|
RW
|
4.4.17
|
|
0xFDEC
|
mmu.ext_cs0_code1_log
|
0x0000
|
RW
|
4.4.18
|
|
0xFDEE
|
mmu.ext_cs0_code1_phy
|
0x0000
|
RW
|
4.4.19
|
|
0xFDF0
|
mmu.ext_cs0_code1_size
|
0x0000
|
RW
|
4.4.20
|
|
0xFDF2
|
mmu.ext_cs1_code1_log
|
0x0000
|
RW
|
4.4.21
|
|
0xFDF4
|
mmu.ext_cs1_code1_phy
|
0x0000
|
RW
|
4.4.22
|
|
0xFDF6
|
mmu.ext_cs1_code1_size
|
0x0000
|
RW
|
4.4.23
|
|
0xFDF8
|
mmu.ram_data0_log
|
0x0000
|
RW
|
4.4.24
|
|
0xFDFA
|
mmu.ram_data0_phy
|
0x0000
|
RW
|
4.4.25
|
|
0xFDFC
|
mmu.ram_data0_size
|
0x0000
|
RW
|
4.4.26
|
|
0xFDFE
|
mmu.ram_data1_log
|
0x0000
|
RW
|
4.4.27
|
|
0xFE00
|
mmu.ram_data1_phy
|
0x0000
|
RW
|
4.4.28
|
|
0xFE02
|
mmu.ram_data1_size
|
0x0000
|
RW
|
4.4.29
|
|
0xFE04
|
reserved
|
0x0000
|
RW
|
4.4.30
|
|
0xFE06
|
mmu.flash_data0_log
|
0x0000
|
RW
|
4.4.31
|
|
0xFE08
|
mmu.flash_data0_phy
|
0x0000
|
RW
|
4.4.32
|
|
0xFE0A
|
mmu.flash_data0_size
|
0x0000
|
RW
|
4.4.33
|
|
0xFE0C
|
mmu.flash_data1_log
|
0x0000
|
RW
|
4.4.34
|
|
0xFE0E
|
mmu.flash_data1_phy
|
0x0000
|
RW
|
4.4.35
|
|
0xFE10
|
mmu.flash_data1_size
|
0x0000
|
RW
|
4.4.36
|
|
0xFE12
|
mmu.cache_data_log
|
0x0000
|
RW
|
4.4.37
|
|
0xFE14
|
mmu.ext_cs0_data0_log
|
0x0000
|
RW
|
4.4.38
|
|
0xFE16
|
mmu.ext_cs0_data0_phy
|
0x0000
|
RW
|
4.4.39
|
|
0xFE18
|
mmu.ext_cs0_data0_size
|
0x0000
|
RW
|
4.4.40
|
|
0xFE1A
|
mmu.ext_cs1_data0_log
|
0x0000
|
RW
|
4.4.41
|
|
0xFE1C
|
mmu.ext_cs1_data0_phy
|
0x0000
|
RW
|
4.4.42
|
|
0xFE1E
|
mmu.ext_cs1_data0_size
|
0x0000
|
RW
|
4.4.43
|
|
0xFE20
|
mmu.ext_cs0_data1_log
|
0x0000
|
RW
|
4.4.44
|
|
0xFE22
|
mmu.ext_cs0_data1_phy
|
0x0000
|
RW
|
4.4.45
|
|
0xFE24
|
mmu.ext_cs0_data1_size
|
0x0000
|
RW
|
4.4.46
|
|
0xFE26
|
mmu.ext_cs1_data1_log
|
0x0000
|
RW
|
4.4.47
|
|
0xFE28
|
mmu.ext_cs1_data1_phy
|
0x0000
|
RW
|
4.4.48
|
|
0xFE2A
|
mmu.ext_cs1_data1_size
|
0x0000
|
RW
|
4.4.49
|
|
0xFE2C
|
mmu.usb_data_log
|
0x0000
|
RW
|
4.4.50
|
|
0xFE2E
|
mmu.emac_data_log
|
0x0000
|
RW
|
4.4.51
|
|
0xFE30
|
mmu.flash_ctrl
|
0x0000
|
RW
|
4.4.52
|
|
0xFE32
|
mmu.ram_ctrl
|
0x0000
|
RW
|
4.4.53
|
|
0xFE34
|
mmu.dma_ctrl
|
0x0000
|
RW
|
4.4.54
|
|
0xFE36
|
mmu.adr_err
|
0x0000
|
RW
|
4.4.55
|
|
0xFE38
|
mmu.data_cache_sts
|
0x0000
|
RW
|
4.4.56
|
|
|
|
|
|
|